page . 1 september 03.2010-rev.00 2N7002FN3 60v n-channel enhancement mode mosfet features ? r ds(on) , v gs @10v,i ds @500ma=5 ? r ds(on) , v gs @4.5v,i ds @50ma=7.5 ? advanced trench process technology ? high density cell design for ultra low on-resistance ? specially designed for battery operated systems, solid-state relays drivers : relays, displays, lamps, solenoids, memories, etc. ? in compliance with eu rohs 2002/95/ec directives mechanical data ? case: dfn 3l, plastic ? terminals: solderable per mil-std-750, method 2026 ? marking: ah maximum ratings and thermal characteristics (t a =25 o c unless otherwise noted ) note 1 : maximum dc current limited by the package 2 : surface mounted on fr4 board,t <10 sec pan jit reserves the right to improve product dseign, functions and reliability without notice 0.042(1.05) 0.037(0.95) 0.013(0.32) 0.008(0.22) 0.014(0.36) 0.013(0.32) 0.008(0.22) 0.002(0.05) max. 0.026(0.65) 0.021(0.55) 0.0 (0.55) 0.047(0.45) 22 0.0 (0.55) 0.047(0.45) 22 0.0 (0.20) 0.004(0.10) 08 0.0 (0.20) 14 0.0 (0.20) 0.004(0.10) 08 dfn 3l dfn 3l unit : inch(mm) unit : inch(mm) pa ra me te r s ymb ol l imit units drain-source voltage v ds 60 v gats-source voltage v gs + 20 v continous drain current i d 115 ma pulsed drain current (1) i dm 800 ma maximum power dissipation p d 150 mw junction-to ambient thermal resistance (pcb mounted) 2 r ja 883 o c/w operating junction and storage temperature range t j ,t stg -55 to +150 o c 1 2 3
page . 2 september 03.2010-rev.00 2N7002FN3 electrical characteristics v dd v out v in r g r l switching test circuit gate charge test circuit v dd v gs r g r l 1ma parameter symbol test condition min. typ. max. units static drain-source breakdown voltage bv dss v gs =0v, i d =10ma 60 - - v gate threshold voltage v gs( th ) v ds =v gs , i d =250ma 1 - 2.5 v drain-source on-state resistance r ds(on) v gs =4.5v, i d =50ma - - 7.5 w drain-source on-state resistance r ds(on) v gs =10v, i d =500ma - - 5 zero gate voltage drain current i dss v ds =60v,v gs =0v --1ma gate body leakage i gss v gs =+ 20v,v ds =0v - - + 100 na forward transconductance g fs v ds =15v, i d =250ma 100 - - ms dynamic to t a l g a t e c h a r g e q g v ds =15v, i d =500ma, v gs =4.5v -0.60.7 nc gate-source charge q gs -0.1- gate-drain charge q gd -0.08- turn-on delay time ton v dd =10v,r l =20w i d =500ma,v gen =10v,r g =10w -915 ns turn-off delay time t off -2126 input capacitance c is s v ds =25v, v g s=0v, f=1.0mhz --50 pf output capacitance c oss --25 reverse transfer capacitance c rss --5 source-drain diode max.diode forward current i s ---115ma diode foreard voltage v sd i s =250ma,v gs =0v - 0.93 1.2
page . 3 september 03.2010-rev.00 legal statement copyright panjit international, inc 2010 the information presented in this document is believed to be accurate and reliable. the specifications and information herein are subject to change without notice. pan jit makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose. pan jit products are not authorized for use in life support devices or systems. pan jit does not convey any license under its patent rights or rights of others. mounting pad layout order information ? packing information t/r - 8k per 7" plastic reel 0.02 (0.70) 8 0.02 (0.68) 7 0.043 (1.10) 0.017 (0.42) 0.010 (0.26) 0.004 (0.10) 0.024 (0.60) 0.010 (0.25) dfn 3l dfn 3l 2N7002FN3
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